I’m a Computer Engineering student at the University of Waterloo. I thrive at the bleeding edge of technology and relish discussing startups, emerging trends, scifi & thrillers.

I welcome thoughtful disagreements and am always curious to see things from other perspectives. I enjoy playing the guitar, hitting the badminton court, and being close to nature, especially by the ocean. Also fascinated by philosophy and space.

Currently, I am:

• Building a high-performance ALU for a GPU - transistor level layout & RTL design

Before that I have,

• Performed IP-level verification and resolved RTL flaws - debugged Verilog and wrote C drivers to streamline emulation & hw/sw simulation of RISC-V core on an FPGA + Enhanced in-house EDA Automation workflows @Low Power Futures
• Built StepOne, a platform to help with idea validation and customer discovery powered by a multi-agentic system that simulates realistic interviews with a diverse set of personas to choose from, enabling founders to gain actionable feedback and market insights — More here
• Designed an I-BERT LLM in hardware — implemented from scratch: right from the basic arithmetic blocks such as multiply-accumulate modules to the transformer primitives units (Softmax, LayerNorm) in SystemVerilog, to run tokens natively on an FPGA. View writeup here
• Implemented a UART RX/TX core in Verilog, verified with testbenches, and deployed on an Altera FPGA for reliable serial communication — More here
• Collaborated with cross-functional teams to lead the development of an automated manufacturing line prototype for a multimillion-dollar medical device production initiative - @ATS Life Sciences
• Developed backend features and integrations for Superstar, a creator marketing platform; optimized Docker images for production builds and updated + streamlined test backlog in CI/CD pipeline to ensure reliable automated code validation - @Intrepid Financial Technologies

Feel free to reach out at arpitarunkumaar@gmail.com